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LTC3549 250mA Low VIN Buck Regulator in 2mm x 3mm DFN FEATURES

DESCRIPTIO

1.6V to 5.5V Input Voltage Range Internal Soft-Start Low Ripple Burst Mode(R) Operation Output Ripple: <20mVP-P IQ: 50A 2.25MHz Constant-Frequency Operation High Efficiency: Up to 93% 250mA Output Current (VIN = 1.8V, VOUT = 1.2V) 450mA Peak Inductor Current No Schottky Diode Required Low Dropout Operation: 100% Duty Cycle 0.611V Reference Voltage Stable with Ceramic Capacitors Shutdown Mode Draws <1A Supply Current Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protection Available in a Low Profile (0.75mm) 6-Lead (2mm x 3mm) DFN Package
The LTC(R)3549 is a high efficiency, monolithic synchronous buck regulator using a constant-frequency, current mode architecture. The output voltage is adjusted via an external resistor divider. A fixed switching frequency of 2.25MHz is supported. This switching frequency allows the use of small surface mount inductors and capacitors, including ceramics. Supply current during Burst Mode operation is only 50A dropping to < 1A in shutdown. The 1.6V to 5.5V input voltage range makes the LTC3549 ideally suited for single cell Li-Ion, Li-Metal and 2-cell alkaline, NiCd or NiMH battery-powered applications. 100% duty cycle capability provides low dropout operation, extending battery life in portable systems. Burst Mode operation can be user-enabled, increasing efficiency at light loads, further extending battery life. The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. Internal soft-start offers controlled output voltage rise time at startup without the need for external components.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131.
APPLICATIO S

2 AA-Cell Applications Cellular Phones Digital Cameras MP3 Players
TYPICAL APPLICATIO
Burst Mode Efficiency, VOUT = 1.5V
100 1 90 80 0.1 POWER LOSS (W)
High Efficiency Step-Down Converter
LTC3549 SW 4.7F CER VIN RUN MODE VFB GND *TDK VLF3012AT-3R3MR87
3549 TA01
3.3H* 22pF
VIN 1.8V TO 5.5V
EFFICIENCY (%)
VOUT 1.5V 4.7F CER
70 60 50 40 30 20 10 0 0.1
137k 200k
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0.01 VIN = 1.8V 0.001 VIN = 2.5V VIN = 3.1V POWER LOST AT VIN = 2.5V 0.0001 10 100 1k 1 LOAD CURRENT (mA) 3549 TA02
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LTC3549 ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW MODE RUN VFB
Input Supply Voltage ................................... -0.3V to 6V RUN, VFB, MODE Voltages .............-0.3V to (VIN + 0.3V) SW Voltage < 100ns Pulse .............-0.3V to (VIN + 0.3V) Operating Temperature Range (Note 2) ... -40C to 85C Junction Temperature (Note 3) ........................... 125C Storage Temperature Range.................. -65C to 125C
6
5
4
7
1 VIN
2 GND
3 SW
DCB PACKAGE 6-LEAD (2mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 64C/W EXPOSED PAD (PIN 7) IS GND MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC3549EDCB
DCB PART MARKING LBZR
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL VIN VRUN IRUN VMODE IMODE VFB PARAMETER Input Voltage Range RUN Threshold RUN Leakage Current MODE Threshold MODE Leakage Current Regulated Feedback Voltage
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C, VIN = 2.2V.
CONDITIONS

MIN 1.6 0.3 0.3 0.599 0.597 0.596 40
TYP 0.7 0.01 0.65 0.01 0.611 0.611 0.611 60 0.04 0.04
MAX 5.5 1.1 1 1.1 1 0.623 0.623 0.626 30 80 0.4 0.4 0.6
UNITS V V A V A V V V nA mV %/V %/V A %
VRUN = 0 or 2.2V
VMODE = 0 or 2.2V TA = 25C (Note 4) 0C TA 85C (Note 4) -40C TA 85C (Note 4) VOVL = VFBOVL - VFB (Note 6) 1.6V < VIN < 5.5V (Note 4) IOUT = 100mA, 1.6V < VIN < 5.5V (Note 7) VFB = 0.5V or VOUT = 90% Pulse Skip Mode, VOUT = 1.2V, 50mA < ILOAD < 250mA (Note 7) 0.3
IVFB VOVL VFB VOUT IPK VLOADREG
Feedback Current VFBOVL Overvoltage Lockout Reference Voltage Line Regulation Output Voltage Line Regulation Peak Inductor Current Output Voltage Load Regulation
0.45 0.5
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LTC3549 ELECTRICAL CHARACTERISTICS
SYMBOL IS PARAMETER Input DC Bias Current Active Mode Sleep Mode Shutdown Nominal Oscillator Frequency Soft-Start Period RDS(ON) of P-Channel FET RDS(ON) of N-Channel FET SW Leakage RUN ISW = 100mA, Wafer Level ISW = 100mA, DD Package (Note 7) ISW = 100mA, Wafer Level ISW = 100mA, DD Package (Note 7) VRUN = 0V, VSW = 0V or 5.5V, VIN = 5.5V
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C, VIN = 2.2V.
CONDITIONS (Note 5) VOUT = 90%, ILOAD = 0A VOUT = 103%, ILOAD = 0A VRUN = 0V, VIN = 5.5V
MIN
TYP 300 50 0.1
MAX 475 95 5 2.7
UNITS A A A MHz ms
fOSC tSS RPFET RNFET ILSW
1.8
2.25 1 0.5 0.56 0.35 0.4 0.1
1
A
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Voltage on any pin may not exceed 6V. Note 2: The LTC3549E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: LTC3549: TJ = TA + (PD)(64C/W) This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Overtemperature protection
becomes active at a junction temperature greater than the maximum operating junction temperature. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 4: The LTC3549 is tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 6: VOVL is the amount VFB must exceed the regulated feedback voltage. Note 7: Determined by design, not production tested.
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LTC3549 TYPICAL PERFOR A CE CHARACTERISTICS
(From Typical Application on the front page, except for the resistive divider resistor values) Efficiency/Power Loss vs Load Current, VOUT = 1.5V, Burst Mode
100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 0 0.1 1 10 100 LOAD CURRENT (mA) POWER LOSS VIN = 1.8V VIN = 2.5V VIN = 3.1V 0.0001 1000
3549 G01a
EFFICIENCY (%)
60 50 40 30 20 10 0 0.1 EFFICIENCY POWER LOSS VIN = 1.8V VIN = 1.8V VIN = 2.5V VIN = 2.5V VIN = 3.1V VIN = 3.1V 1 10 100 LOAD CURRENT (mA) 0.01
EFFICIENCY (%)
EFFICIENCY VIN = 1.8V VIN = 2.5V VIN = 3.1V
Efficiency vs Input Voltage VOUT = 1.2V, Pulse Skip
100 90 80 70 EFFICIENCY (%) EFFICIENCY (%) 60 50 40 30 20 10 0 1.5 IOUT : 0.1mA 1mA 2.5 3.5 4.5 INPUT VOLTAGE (V) 10mA 100mA 5.5
3549 G03
EFFICIENCY (%)
Efficiency vs Load Current VOUT = 1.2V, Burst Mode
100 90 80 EFFICIENCY (%) EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 VIN = 1.6V VIN = 2.5V VIN = 3.1V 1 10 100 LOAD CURRENT (mA) 1000
3549 G05a
70 60 50 40 30 20 10 0 0.1 1 10 100 LOAD CURRENT (mA) 1000
3549 G05b
REFERENCE VOLTAGE (V)
4
UW
1 300mA
Efficiency/Power Loss vs Load Current, VOUT = 1.5V, Pulse Skip
100 90 0.1 POWER LOSS (W) 80 70 0.1 POWER LOSS (W) 1 100 90 80 70 60 50 40 30 20 10
Efficiency vs Input Voltage VOUT = 1.2V, Burst Mode Operation
0.01
IOUT : 0.1mA 1mA 10mA 100mA 300mA 2.5 3.5 4.5 INPUT VOLTAGE (V) 5.5
3549 G02
0.001
0.001
0.0001 1000
0 1.5
3549 G01b
Efficiency vs Load Current VOUT = 1.8V, Burst Mode
100 90 80 70 60 50 40 30 20 10 0 0.1 1 0.01 L = 4.7H 1 100 90 80 0.1 POWER LOSS (W) 70 60 50 40 30 20 10
Efficiency vs Load Current VOUT = 1.8V, Pulse Skip
L = 4.7H
EFFICIENCY VIN = 2.5V VIN = 3.6V 0.001 VIN = 4.2V POWER LOSS VIN = 3.6V 10 100 LOAD CURRENT (mA)
0.0001 1000
0 0.1
EFFICIENCY VIN = 2.5V VIN = 3.6V VIN = 4.2V 1 10 100 LOAD CURRENT (mA) 1000
3549 G04b
3549 G04a
Efficiency vs Load Current VOUT = 1.2V, Pulse Skip
100 90 80 0.6132 VIN = 1.6V VIN = 2.5V VIN = 3.1V 0.6111
Reference Voltage vs Temperature
VIN = 1.6V VIN = 2.2V VIN = 4.2V
0.6090
0.6069 -50
-25
0 25 50 75 TEMPERATURE (C)
100
125
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3549 G06
LTC3549 TYPICAL PERFOR A CE CHARACTERISTICS
(From Typical Application on the front page, except for the resistive divider resistor values) Oscillator Frequency vs Temperature
2.35 OSCILLATOR FREQUENCY SHIFT (%) OSCILLATOR FREQUENCY (MHz) 2.30 2.25 2.20 2.15 2.10 2.05 -50 VIN = 2.7V 2.5 2.0 OUTPUT VOLTAGE (V) 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 1.5 3.5 2.5 4.5 INPUT VOLTAGE (V) 5.5
3549 G08
VIN = 1.6V
VIN = 4.2V
-25
0 25 50 75 TEMPERATURE (C)
RDS(ON) vs Input Voltage
0.9 0.8 0.7 0.6 RDS(ON) () 0.5 0.4 0.3 0.2 0.1 0 1.5 2.5 3.5 INPUT VOLTAGE (V) 4.5 5.5
3549 G10
DYNAMIC SUPPLY CURRENT--PULSE SKIP (A)
MAIN SWITCH
RDS(ON) ()
SYNCHRONOUS SWITCH
Dynamic Supply Current vs Temperature, VIN = 3.6V, VOUT = 1.5V, No Load
350 DYNAMIC SUPPLY CURRENT (A) 300 250 200 150 100 50 0 -50 BURST SWITCH LEAKAGE (nA) 250
SWITCH LEAKAGE (nA)
PULSE SKIP
-25
0 25 50 75 TEMPERATURE (C)
UW
100 100
Oscillator Frequency Shift vs Input Voltage
1.205 1.204 1.203 1.202
Output Voltage vs Load Current VIN = 1.6V, VOUT = 1.2V
BURST 1.201 1.200 1.199 0 200 100 LOAD CURRENT (mA) 300
3549 G09
VOUT PULSE SKIP
125
3549 G07
RDS(ON) vs Temperature
0.95 0.85 0.75 0.65 0.55 0.45 0.35 0.25 0.15 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125
3549 G11
Dynamic Input Current VOUT = 1.5V, 247k Load
DYNAMIC SUPPLY CURRENT--BURST MODE (A) 10000 Burst Mode OPERATION 70 60 50 40 1000 30 PULSE SKIP MODE 20 10 0 100 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 INPUT VOLTAGE (V) 3549 G12
MAIN SWITCH VIN = 1.6V VIN = 2.7V VIN = 4.2V
SYNCHRONOUS SWITCH VIN = 1.6V VIN = 2.7V VIN = 4.2V
Switch Leakage vs Temperature VIN = 5.5V
1.6 1.4 200 1.2 1.0
Switch Leakage vs Input Voltage
150
SYNCHRONOUS SWITCH
MAIN SWITCH 0.8 0.6 0.4 0.2 SYNCHRONOUS SWITCH 0 4 2 INPUT VOLTAGE (V) 6
3549 G15
100
50
MAIN SWITCH
125
3549 G13
0 -50
0 -25 0 25 50 75 TEMPERATURE (C) 100 125
3549 G14
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LTC3549 TYPICAL PERFOR A CE CHARACTERISTICS
(From Typical Application on the front page, except for the resistive divider resistor values) Start-Up from Shutdown Burst Mode Operation
VOUT 20mV/DIV AC COUPLED VSWITCH 2V/DIV
VOUT 500mV/DIV VRUN 1V/DIV
IL 50mA/DIV VIN = 3.6V VOUT = 1.2V 1k Load
Load Step 25mA to 250mA Pulse Skip
VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED
ILOAD 200mA/DIV IL 200mA/DIV
3549 G18
VIN = 2.2V VOUT = 1.2V
Load Step 0mA to 250mA Burst Mode Operation
VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED
ILOAD 200mA/DIV IL 200mA/DIV
3549 G20
VIN = 2.2V VOUT = 1.2V
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Burst Mode Operation ILOAD = 20mA
IL 100mA/DIV
3549 G16 3549 G19
200s/DIV
VIN = 2.5V VOUT = 1.2V ILOAD = 2OmA
1s/DIV
Load Step 0mA to 250mA Pulse Skip
ILOAD 200mA/DIV IL 200mA/DIV
3549 G17
20s/DIV
VIN = 2.2V VOUT = 1.2V
20s/DIV
Load Step 25mA to 250mA Burst Mode Operation
ILOAD 200mA/DIV IL 200mA/DIV
3549 G21
20s/DIV
VIN = 2.2V VOUT = 1.2V
20s/DIV
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LTC3549 PI FU CTIO S
VIN (Pin 1): Main Supply Pin. Must be closely decoupled to GND, Pins 2 and 7, with a 4.7F or greater ceramic capacitor. GND (Pin 2): N/C. Ground this pin. SW (Pin 3): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. MODE (Pin 4): Mode Select Input. To select pulse-skipping mode, force this pin above 1.1V. Forcing this pin below 0.3V selects Burst Mode operation. Do not leave MODE floating. RUN (Pin 5): Run Control Input. Forcing this pin above 1.1V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1A supply current. Do not leave RUN floating. VFB (Pin 6): Feedback Pin. Receives the feedback voltage from an external resistive divider across the output. GND (Pin 7): Exposed Pad. The Exposed Pad is ground. It must be soldered to PCB ground to provide both electrical contact and optimum thermal performance.
FU CTIO AL DIAGRA
MODE 4 SLOPE COMP OSCILLATOR OSC
VFB 6 0.611V
EA
SOFTSTART VIN RUN 5 REFERENCE 0.671 SHUTDOWN
+
OVDET
-
-
IRCMP
+
W
- +
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0.65V
1 VIN
- +
0.4V
- +
EN SLEEP
-
BURST Q Q SWITCHING LOGIC AND BLANKING CIRCUIT
ICOMP
+
5
S R
RS LATCH
ANTISHOOTTHRU
3 SW
OV
2 GND 7 GND
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LTC3549 OPERATIO
Main Control Loop The LTC3549 uses a constant-frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch is controlled by the output of error amplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.611V reference, which in turn, causes the EA amplifier's output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. Comparator OVDET guards against transient overshoots >10% by turning the main switch off and keeping it off until the transient has ended. Burst Mode Operation The LTC3549 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply connect the MODE pin to GND. To disable Burst Mode operation and enable PWM pulse-skipping mode, connect the MODE pin to VIN or drive it with a logic high (VMODE > 1.1V). In this mode, the efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 50mA. The advantage of pulseskipping mode is lower output ripple and less interference to audio circuitry. When the converter is in Burst Mode operation, the minimum peak current of the inductor is set to approximately 100mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 50A. In this sleep
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state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier's output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand. Short-Circuit Protection When the output is shorted to ground the LTC3549 limits the synchronous switch current to 0.45A. If this limit is exceeded, the top power MOSFET is inhibited from turning on until the current in the synchronous switch falls below 0.45A. Dropout Operation As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. Another important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3549 is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information section). Slope Compensation Slope compensation provides stability in constant-frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Internal Soft-Start At start-up when the RUN pin is brought high, the internal reference is linearly ramped from 0V to 0.611V in 1ms. The regulated feedback voltage will follow this ramp, resulting in the output voltage ramping from 0% to 100% in 1ms. The average current in the inductor during soft-start will
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LTC3549 OPERATION
be defined by the combination of the current needed to charge the output capacitance and the current provided to the load as the output voltage ramps up. The start-up waveform, shown in the Typical Performance Characteristics, shows the output voltage start-up from 0V to 1.2V with a 1k load and VIN = 3.6V.
APPLICATIO S I FOR ATIO
The basic LTC3549 application circuit is shown on the first page of this data sheet. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Selection For most applications, the value of the inductor will fall in the range of 1H to 10H. Its value is chosen based on the desired ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in Equation 1. A reasonable starting point for setting ripple current is IL = 100mA (40% of 250mA). IL = VOUT VOUT 1- V f *L IN (1)
The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 300mA rated inductor should be enough for most applications (250mA + 50mA). For better efficiency, choose a low DC resistance inductor. The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 100mA. Lower inductor values (higher IL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy
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materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3549 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3549 applications.
Table 1. Representative Surface Mount Inductors
MANUFACTURER Taiyo Yuden MAX DC VALUE CURRENT (H) (A) 2.2 2.2 3.3 4.7 4.7 4.7 2.2 3.3 4.7 2.2 3.3 4.7 315 240 280 210 950 450 1 0.87 0.74 1 0.87 0.74 HEIGHT (mm) 1.6 1.25 1.6 1.6 1.2 2 1.2 1.2 1.2 1.0 1.0 1.0 PART NUMBER LB2016T2R2M LB2012T2R2M LB2016T3R3M LB2016T4R7M ELT5KT4R7M LQH32CN4R7M34 VLF3012AT2R2M1R0 VLF3012AT3R3MR87 VLF3012AT4R7MR74 VLF3010AT2R2M1R0 VLF3010AT3R3MR87 VLF3010AT4R7MR70 DCR 0.13 0.23 0.2 0.25 0.2 0.2 0.088 0.11 0.16 0.10 0.15 0.24 Panasonic Murata TDK
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CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: 1/ 2 VOUT ( VIN - VOUT ) CIN Re quired IRMS IOUT(MAX) VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant devia-
[
]
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LTC3549 APPLICATIO S I FOR ATIO
tions do not offer much relief. Note that the capacitor manufacturer's ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple VOUT is determined by: 1 VOUT = IL ESR + 8 * f * COUT where f = operating frequency, COUT = output capacitance and IL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since IL increases with input voltage. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors The LTC3549 typically will require an output capacitor in the 4.7F to 10F range for optimum stability. Higher
VOUT R1
LTC3549 VFB
R2 GND
3549 F01
Figure 1. Setting the LTC3549 Output Voltage
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value, lower cost ceramic capacitors are now available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3549's control loop does not depend on the output capacitor's ESR for stable operation, ceramic capacitors can be used to achieve very low output ripple and small circuit size. However, care must be taken when these capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming The output voltage is set by a resistive divider according to the following formula: R1 VOUT = 0 . 611V 1 + R2 (2) The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 1 Table 2 gives 1% resistor values for selected output voltages.
Table 2. Resistor Values for Selected Output Voltages
VOUT 0.85V 1.2V 1.5V 1.8V R1 53.6k 133k 200k 267k R2 137k 137k 137k 137k
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LTC3549 APPLICATIO S I FOR ATIO
Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3549 circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence, as illustrated in Figure 2. 1. The VIN quiescent current is due to two components: the DC bias current as given in the Electrical Characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from
1.0000 VIN BURST 2.5V 3.6V 4.2V
0.1000 POWER LOSS (W)
0.0100
0.0010
0.0001 0.1
Figure 2. Power Loss vs Load Current
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high to low to high again, a packet of charge, dQ, moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is "chopped" between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT) (1 - DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss.
VOUT = 1.8V VIN PULSE SKIP 2.5V 3.6V 4.2V 1 10 100 LOAD CURRENT (mA) 1000
3549 F02
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LTC3549 APPLICATIO S I FOR ATIO
Thermal Considerations In most applications the LTC3549 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3549 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3549 from exceeding the maximum junction temperature, the user will need to do a thermal analysis. The goal of the thermal analysis is to determine whether the operating conditions exceed the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(JA) where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3549 in dropout at an input voltage of 1.6V, a load current of 250mA and an ambient temperature of 75C. In the Switch Resistance graph shown in the Typical Performance Characteristics, the RDS(ON) of the P-channel switch at 75C is approximately 0.8. Therefore, power dissipated by the part is: PD = ILOAD2 * RDS(ON) = 50mW For the DCB6 package, the JA is 64C/W. Thus, the junction temperature of the regulator is: TJ = 75C + (0.05)(64) = 78.2C which is well below the maximum junction temperature of 125C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)).
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Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ILOAD * ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (> 1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 * CLOAD). Thus, a 10F capacitor charging to 3.3V would require a 250s rise time, limiting the charging current to about 130mA.
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LTC3549 APPLICATIO S I FOR ATIO
Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3549. These items are also illustrated graphically in the layout diagram of Figure 3. Check the following in your layout. 1. Does the capacitor CIN connect to the power VIN (Pin 1) and GND (Pins 2, 7) as close as possible? This capacitor provides the AC current to the internal power MOSFETs and their drivers. 2. Are the COUT and L1 closely connected? The (-) plate of COUT returns current to GND and the (-) plate of CIN. 3. The resistor divider, R1 and R2, must be connected between the (+) plate of COUT and a ground sense line terminated near GND (Exposed Pad). The feedback
Figure 3a. Buck Regulator Top Layer
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signals VFB should be routed away from noisy components and traces, such as the SW line (Pin 3), and its trace should be minimized. 4. Keep sensitive components away from the SW pins. The input capacitor CIN and the resistors R1 and R2 should be routed away from the SW traces and the inductors. 5. A ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the GND pin at one point. They should not share the high current path of CIN or COUT. 6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VIN or GND.
Figure 3b. Buck Regulator Bottom Layer
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LTC3549 APPLICATIO S I FOR ATIO
Design Example As a design example, assume the LTC3549 is used in a 2-alkaline cell battery-powered application. The VIN will be operating from a maximum of 3.1V down to about 1.8V. The load current requirement is a maximum of 250mA but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 1.5V. With this information we can calculate L using Equation 3: V V L = OUT 1 - OUT f * IL VIN (3)
VIN 1.8V TO 3.1V
CIN 4.7F CERAMIC
*TDK VLF3012AT-3R3MR87
Figure 4a. High Efficiency Step-Down Regulator
100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 0 0.1 1 10 100 LOAD CURRENT (mA) 1000
3549 F04b
VIN = 1.8 VIN = 3.1 VIN = 2.5 VOUT 100mV/DIV AC COUPLED ILOAD 200mA/DIV IL 200mA/DIV
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Figure 4b. Burst Mode Efficiency, VOUT = 1.5V
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Substituting VOUT = 1.5V, VIN = 3.1V, IL = 100mA and f = 2.25MHz in Equation 3 gives: L= 1 1.5 1.5 1- 3 . 3 H 2 . 25MHz * 100mA 3 . 1 For best efficiency choose a 350mA or greater inductor with less than 0.3 series resistance. CIN will require an RMS current rating of at least 0.125A ILOAD(MAX) /2 at temperature. For the feedback resistors, choose R2 = 137k. Then, from Equation 3, R1 is 200k. Figure 4 shows the complete circuit along with its efficiency curve.
L1 3.3H* RUN SW CL 22pF VOUT 1.5V COUT 4.7F CERAMIC LTC3549 VIN MODE GND VFB R1 200k R2 137k
3549 F04a
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20s/DIV VIN = 2.5V VOUT = 1.5V ILOAD = 100mA to 250mA
Figure 4c. Load Step Response
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LTC3549 PACKAGE DESCRIPTIO U
DCB Package 6-Lead Plastic DFN (2mm x 3mm)
(Reference LTC DWG # 05-08-1715)
0.70 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 1.35 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 2.00 0.10 (2 SIDES) R = 0.115 TYP R = 0.05 TYP 0.40 0.10 4 6 3.00 0.10 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 3 0.200 REF 0.75 0.05 1 1.65 0.10 (2 SIDES) PIN 1 NOTCH R0.20 OR 0.25 x 45 CHAMFER
(DCB6) DFN 0405
3.55 0.05
1.65 0.05 (2 SIDES)
2.15 0.05
0.25 0.05 0.50 BSC
1.35 0.10 (2 SIDES) 0.00 - 0.05 BOTTOM VIEW--EXPOSED PAD
NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC3549 TYPICAL APPLICATIO
VIN 2.5V TO 4.2V
Efficiency vs Load Current
100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 VOUT = 1.8V 0 1 0.1 10 100 LOAD CURRENT (mA) 1000
3549 TA03b
VIN = 2.5V VIN = 3.6V VIN = 4.2V
RELATED PARTS
PART NUMBER LTC1878 LTC1879 LT3020 LTC3025 LTC3404 LTC3405/LTC3405A LTC3406/LTC3406B LTC3407/LTC3407-2 LTC3409 LTC3410/LTC3410B LTC3411 DESCRIPTION 600mA (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 1.20A (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 100mA, Low Voltage VLDOTM 100mA, Low Voltage VLDO 600mA (IOUT), 1.4MHz, Synchronous Step-Down DC/DC Converter 300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter COMMENTS 96% Efficiency, VIN: 2.7V to 6V, VOUT(MIN) = 0.8V, IQ = 10A, ISD < 1A, MS8 Package 95% Efficiency, VIN: 2.7V to 10V, VOUT(MIN) = 0.8V, IQ = 15A, ISD < 1A, 16-Lead TSSOP VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, Dropout Voltage = 0.15V, IQ = 120A, ISD < 3A, VOUT = ADJ, DFN/MS8 Packages VIN: 0.9V to 5.5V, VOUT(MIN) = 0.40V, Dropout Voltage = 0.05V, IQ = 54A, ISD < 1A, VOUT = ADJ, DFN Package 96% Efficiency, VIN: 2.7V to 6V, VOUT(MIN) = 0.8V, IQ = 10A, ISD < 1A, MS8 Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20A, ISD < 1A, ThinSOT TM Package 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20A, ISD < 1A, ThinSOT Package
Dual, 800mA (IOUT), 2.25MHz, Synchronous 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40A, ISD < 1A, Step-Down DC/DC Converter 10-Lead MSE Package 600mA, 2.6MHz Low VIN, Synchronous Step-Down DC/DC Converter 300mA, 2.25MHz, Synchronous Step-Down DC/DC Converter 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65A, ISD < 1A, DFN Package 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26A/200A, ISD < 1A, SC70 Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD < 1A, 10-Lead MS Package
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VLDO and ThinSOT are trademarks of Linear Technology Corporation.
16 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005
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L1, 4.7H* RUN CIN 4.7F CERAMIC SW LTC3549 VIN VFB MODE GND *TDK VLF3012AT-4R7MR74
3549 TA03a
CL, 22pF
VOUT 1.8V COUT 4.7F CERAMIC
R1, 267k R2 137k
Load Step Response
VOUT 100mV/DIV AC COUPLED ILOAD 200mA/DIV IL 200mA/DIV
3549 TA03c
20s/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 100mA to 250mA
LT 0706 * PRINTED IN USA

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